diff --git a/src/arm/am335x-bone-common-univ.dtsi b/src/arm/am335x-bone-common-univ.dtsi index cdc9a971f7174471777c7de9fb800da4736ee57a..777aac07cf1ff289c020d4f67e30a958281b1959 100644 --- a/src/arm/am335x-bone-common-univ.dtsi +++ b/src/arm/am335x-bone-common-univ.dtsi @@ -1183,6 +1183,18 @@ /* P9_45 GND */ /* P9_46 GND */ + + /* (ZCZ ball A15) */ + A15_default_pin: pinmux_A15_default_pin { + pinctrl-single,pins = <0x1b0 0x0b>; }; /* Mode 3 */ + A15_clkout_pin: pinmux_A15_clkout_pin { + pinctrl-single,pins = <0x1b0 0x0b>; }; /* Mode 3 */ + A15_gpio_pin: pinmux_A15_gpio_pin { + pinctrl-single,pins = <0x1b0 0x2f>; }; /* Mode 7, RxActive */ + A15_gpio_pu_pin: pinmux_A15_gpio_pu_pin { + pinctrl-single,pins = <0x1b0 0x37>; }; /* Mode 7, Pull-Up, RxActive */ + A15_gpio_pd_pin: pinmux_A15_gpio_pd_pin { + pinctrl-single,pins = <0x1b0 0x27>; }; /* Mode 7, Pull-Down, RxActive */ }; &i2c1 { @@ -2425,6 +2437,17 @@ /* P9_46 GND */ + /* (ZCZ ball A15) */ + A15_pinmux { + compatible = "bone-pinmux-helper"; + status = "okay"; + pinctrl-names = "default", "clkout", "gpio", "gpio_pu", "gpio_pd"; + pinctrl-0 = <&A15_default_pin>; + pinctrl-1 = <&A15_clkout_pin>; + pinctrl-2 = <&A15_gpio_pin>; + pinctrl-3 = <&A15_gpio_pu_pin>; + pinctrl-4 = <&A15_gpio_pd_pin>; + }; cape-universal { compatible = "gpio-of-helper"; diff --git a/src/arm/am335x-bone-common-universal-pins.dtsi b/src/arm/am335x-bone-common-universal-pins.dtsi index f27f5aa5280316b34f70d442706892b033c1e859..8c7b7b246bdc80a49cea98cfcd6a0bc191d521f4 100644 --- a/src/arm/am335x-bone-common-universal-pins.dtsi +++ b/src/arm/am335x-bone-common-universal-pins.dtsi @@ -952,4 +952,16 @@ /* P9_44 GND */ /* P9_45 GND */ /* P9_46 GND */ + + /* (ZCZ ball A15) */ + A15_default_pin: pinmux_A15_default_pin { + pinctrl-single,pins = <0x1b0 0x0b>; }; /* Mode 3 */ + A15_clkout_pin: pinmux_A15_clkout_pin { + pinctrl-single,pins = <0x1b0 0x0b>; }; /* Mode 3 */ + A15_gpio_pin: pinmux_A15_gpio_pin { + pinctrl-single,pins = <0x1b0 0x2f>; }; /* Mode 7, RxActive */ + A15_gpio_pu_pin: pinmux_A15_gpio_pu_pin { + pinctrl-single,pins = <0x1b0 0x37>; }; /* Mode 7, Pull-Up, RxActive */ + A15_gpio_pd_pin: pinmux_A15_gpio_pd_pin { + pinctrl-single,pins = <0x1b0 0x27>; }; /* Mode 7, Pull-Down, RxActive */ };