diff --git a/src/uart-transmit/esp32-c3-uart-interface.c b/src/uart-transmit/esp32-c3-uart-interface.c
index 39f53a1630595711eebbd79b7bdc5b3486973d22..d9ffad59c311c410f79c131c132b0dee7cb50540 100644
--- a/src/uart-transmit/esp32-c3-uart-interface.c
+++ b/src/uart-transmit/esp32-c3-uart-interface.c
@@ -1,9 +1,14 @@
 #include "esp32-c3-uart-interface.h"
 
 static void clearBits(volatile uint32_t *registerAddress, uint32_t bitPositions, uint32_t numBits) {
-    uint32_t mask = (uint32_t)(1 << numBits) - 1;  // Create a mask with the specified number of bits set to 1
-    mask <<= bitPositions;               // Shift the mask to the correct bit positions
-    *registerAddress &= ~mask;           // Clear the bits in the register using bitwise AND with the inverse of the mask
+    uint32_t mask = (uint32_t)(1 << numBits) - 1;
+    mask <<= bitPositions;
+    *registerAddress &= ~mask;
+}
+
+static void setBit(volatile uint32_t *registerAddress, uint32_t bitPositions) {
+    uint32_t mask = (uint32_t)(1 << bitPositions);
+    *registerAddress |= ~mask;
 }
 
 static void init_uart_enable_clk(){
@@ -151,7 +156,11 @@ void enable_uart_transmitter(){
   set_65_to_rd_byte();
   
   // clear UART_TXFIFO_EMPTY_INT interrupt by setting UART_TXFIFO_EMPTY_INT_CLR;
+  setBit(C3_UART_INT_CLR_REG_UART0, 1)
+  
   // enable UART_TXFIFO_EMPTY_INT interrupt by setting UART_TXFIFO_EMPTY_INT_ENA;
+  setBit(C3_UART_INT_ENA_REG_UART0, 1)
+
   // detect UART_TXFIFO_EMPTY_INT and wait for the completion of data transmission.
 }
 
diff --git a/src/uart-transmit/esp32-c3-uart-interface.h b/src/uart-transmit/esp32-c3-uart-interface.h
index 7dfe002d3fb0292099c0833d2109bd55b9ae8466..29b02d2cc1f3de6e844a828179ffb7bebd0b8ba1 100644
--- a/src/uart-transmit/esp32-c3-uart-interface.h
+++ b/src/uart-transmit/esp32-c3-uart-interface.h
@@ -19,7 +19,7 @@
 
 #define C3_UART_INT_CLR_REG_UART0 ((volatile uint32_t *)C3_BASE_OFFSET_UART_CONTROLLER_0+0x0010)
 #define C3_UART_INT_CLR_REG_UART1 ((volatile uint32_t *)C3_BASE_OFFSET_UART_CONTROLLER_1+0x0010)
-// UART_TXFIFO_EMPTY_INT_CLR
+// UART_TXFIFO_EMPTY_INT_CLR is on 1
 
 #define C3_SYSTEM_PERIP_CLK_EN0_REG ((volatile uint32_t *)C3_BASE_OFFSET_SYSTEM_REGISTERS+0x0010)
 // SYSTEM_UART_MEM_CLK_EN is on 24