Register a dummy RAM region for ESP32-C3 so we can properly initialize all others

hw/riscv/esp32_c3.c

@@ -32,6 +32,7 @@ static const struct MemmapEntry {
     hwaddr base;
     hwaddr size;
 } esp32_c3_memmap[] = {
+    [ESP32_C3_DUMMY]  =  {  0x3C800000,  0x0000F   },
     [ESP32_C3_DROM]   =  {  0x3FF00000,  0x1FFFF   },
     [ESP32_C3_IROM]   =  {  0x40000000,  0x5FFFF   },
     [ESP32_C3_IRAM]   =  {  0x4037C000,  0x63FFF   },
@@ -42,7 +43,7 @@ static const struct MemmapEntry {
 // Reset vector according to technical manual page 217
 static const hwaddr esp32_c3_entry = 0x40000400;
 
-static void esp32_c3_setup_reset_vec() {
+static void esp32_c3_setup_reset_vec(void) {
     // TODO: Implement
 }
 
@@ -105,7 +106,8 @@ static void esp32_c3_machine_class_init(ObjectClass *klass, void *data)
     mc->desc = "RISC-V Board compatible with ES32-C3 SDK";
     mc->init = esp32_c3_machine_state_init;
     mc->default_cpu_type = TYPE_RISCV_CPU_ESP32_C3;
-    mc->default_ram_id = "riscv.esp32.c.dram";
+    // We have to pass something here, but want to initialize the RAM ourselves
+    mc->default_ram_id = "riscv.esp32.c.dummyram";
 }
 
 static const TypeInfo esp32_c3_machine_type_info = {
@@ -146,13 +148,12 @@ static void esp32_c3_soc_state_realize(DeviceState *dev, Error **errp)
                            esp32_c3_memmap[ESP32_C3_IRAM].size, &error_fatal);
     memory_region_add_subregion(sys_mem, esp32_c3_memmap[ESP32_C3_IRAM].base,
                                 &sss->iram);
-    /* TODO: How is this supposed to work with the default RAM region?
-    We have to specify one (otherwise segfault), but then it can't be initialized here.
     memory_region_init_ram(&sss->dram, OBJECT(dev), "riscv.esp32.c.dram",
                            esp32_c3_memmap[ESP32_C3_DRAM].size, &error_fatal);
     memory_region_add_subregion(sys_mem, esp32_c3_memmap[ESP32_C3_DRAM].base,
                                 &sss->dram);
-    */
+
+    // TODO: Do we need to register dummy RAM here?
 }
 
 static void esp32_c3_soc_class_init(ObjectClass *klass, void *data)

include/hw/riscv/esp32_c3.h

@@ -39,6 +39,7 @@ typedef struct Esp32C3SoCState {
     /*< public >*/
     RISCVHartArrayState cpus;
     DeviceState *plic;
+    MemoryRegion dummy;
     MemoryRegion irom;
     MemoryRegion drom;
     MemoryRegion iram;
@@ -58,6 +59,7 @@ typedef struct Esp32C3MachineState {
 } Esp32C3MachineState;
 
 enum {
+    ESP32_C3_DUMMY,
     ESP32_C3_DROM,
     ESP32_C3_IROM,
     ESP32_C3_IRAM,