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Commit f1432e3e authored by Jakob's avatar Jakob
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refactor: easier register access

parent 5ea33b13
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1 merge request!1copied and adapted example from mdk, added init and config uart
#include "esp32-c3-register-interface.h" #include "esp32-c3-register-interface.h"
#include <stdint.h>
void readSetClear(){ void readSetClear(){
uint32_t core_value = *C3_UART_CLK_CONF_REG(0); esp32c3_uart_clk_conf_t *clockConfig = UART_CLK_CONF_REG(0);
// set UART_RST_CORE // set UART_RST_CORE
core_value |= 1<<23; clockConfig->REST_CORE = 1;
*C3_UART_CLK_CONF_REG(0) = core_value;
// clear UART_RST_CORE // clear UART_RST_CORE
core_value &= (uint32_t)~(1<<23); clockConfig->REST_CORE = 0;
*C3_UART_CLK_CONF_REG(0) = core_value;
} }
\ No newline at end of file
#ifndef ESP32_C3_REGISTER_INTERFACE_H #ifndef ESP32_C3_REGISTER_INTERFACE_H
#define ESP32_C3_REGISTER_INTERFACE_H #define ESP32_C3_REGISTER_INTERFACE_H
#include <stdint.h>
#define C3_UART_CONTROLLER_0_BASE ((uint32_t)0x60000000) #define C3_UART_CONTROLLER_0_BASE ((uint32_t)0x60000000)
#define C3_UART_CONTROLLER_1_BASE ((uint32_t)0x60010000) #define C3_UART_CONTROLLER_1_BASE ((uint32_t)0x60010000)
#define C3_UART_CONTROLLER_SELECT(base_select) ((uint32_t)((base_select == 1) ? C3_UART_CONTROLLER_1_BASE : C3_UART_CONTROLLER_0_BASE)) #define C3_UART_CONTROLLER_SELECT(base_select) ((uint32_t)((base_select == 1) ? C3_UART_CONTROLLER_1_BASE : C3_UART_CONTROLLER_0_BASE))
#define C3_UART_CLK_CONF_REG(base_select) ((volatile uint32_t *)(C3_UART_CONTROLLER_SELECT((base_select)) + 0x0078)) typedef volatile struct {
// UART_RST_CORE is on 23 uint32_t SCLK_DIV_B: 6;
// UART_SCLK_SEL is on 20 and 21 (2 bits), selcetion is between 1 and 3 uint32_t SCLK_DIV_A: 6;
// UART_SCLK_DIV_NUM - The integral part of the frequency divisor - 12 to 19 uint32_t SCLK_DIV_NUM: 8;
// UART_SCLK_DIV_A - The numerator of the frequency divisor - 6 to 11 uint32_t SCLK_SEL: 2;
// UART_SCLK_DIV_B - The denominator of the frequency divisor - 0 to 5 uint32_t SCLK_EN: 1;
uint32_t REST_CORE: 1;
uint32_t TX_SCLK_EN: 1;
uint32_t RX_SCLK_EN: 1;
uint32_t TX_REST_CORE: 1;
uint32_t RX_REST_CORE: 1;
uint32_t RESERVED: 4;
} esp32c3_uart_clk_conf_t;
#define UART_CLK_CONF_REG(base_select) ((esp32c3_uart_clk_conf_t *)(C3_UART_CONTROLLER_SELECT((base_select)) + 0x0078)) // Assuming the offset of clk_conf is 0x18 from the base address
void readSetClear(); void readSetClear();
......
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